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PE43703EK Peregrine Semiconductor
Frequency Control Evaluation Board
MFG Part Number: EK43703-01
  
The Digital Attenuator Evaluation Kit board was designed to ease customer evaluation of the PE43703 Digital Step Attenuator. Direct-Parallel Programming Procedure For automated direct-parallel programming, connect the test harness provided with the EVK from the parallel port of the PC to the J1 & Serial header pin and set the D0-D6 SP3T switches to the ‘MIDDLE’ toggle position. Position the Parallel/Serial (P/S) select switch to the Parallel (or left) position. The evaluation software is written to operate the DSA in either Parallel or Serial-Addressable Mode. Ensure that the software is set to program in Direct-Parallel mode. Using the software, enable or disable each setting to the desired attenuation state. The software automatically programs the DSA each time an attenuation state is enabled or disabled. For manual direct-parallel programming, disconnect the test harness provided with the EVK from the J1 and Serial header pins. Position the Parallel/Serial (P/S) select switch to the Parallel (or left) position. The LE pin on the Serial header must be tied to VDD. Switches D0-D6 are SP3T switches which enable the user to manually program the parallel bits. When any input D0-D6 is toggled ‘UP’, logic high is presented to the parallel input. When toggled ‘DOWN’, logic low is presented to the parallel input. Setting D0-D6 to the ‘MIDDLE’ toggle position presents an OPEN, and also forces logic low. Latched-Parallel Programming Procedure For automated latched-parallel programming, the procedure is identical to the direct-parallel method. The user only must ensure that Latched-Parallel is selected in the software. For manual latched-parallel programming, the procedure is identical to direct-parallel except now the LE pin on the Serial header must be logic low as the parallel bits are applied. The user must then pulse LE from 0V to VDD and back to 0V to latch the programming word into the DSA. LE must be logic low prior to programming the next word. Serial-Addressable Programming Procedure Connect the test harness provided with the EVK from the parallel port of the PC to the Serial header pin and set the D0-D6 SP3T switches to the ‘MIDDLE’ toggle position. Position the Parallel/Serial (P/S) select switch to the Serial (or right) position. Prior to programming, the user must define an address setting using the ADD header pin. Jump the middle pins on the ADD header A0-A2 (or lower) row of pins to set logic high, or jump the middle pins to the upper row of pins to set logic low. If the ADD pins are left open, then 000 become the default address. The evaluation software is written to operate the DSA in either Parallel or Serial-Addressable Mode. Ensure that the software is set to program in Serial-Addressable mode. Using the software, enable or disable each setting to the desired attenuation state. The software automatically programs the DSA each time an attenuation state is enabled or disabled.
 
Key AttributesValue
Frequency Range : Minimum Frequency0 MHz
Frequency Range : Maximum Frequency4000 MHz
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This product is available in the following countries:
  • Global
   
PEREGRINE SEMICONDUCTOR